Jules Richardson wrote:
  Hmm, if I'm thinking right, all I need to do
is invert A7 from the ISA
 BUS before it goes through the selection circuitry, and that'll plonk
 the FDC at a base address of 0x370 rather than 0x3f0. Does that sound
 sensible? There's even an unused NAND gate on the board that I can use
 to do the inversion if so.
 I think that should work... 
 ... and I'm not sure if I need to change the IRQ and DMA lines too. Maybe the
 primary and secondary FDCs in a PC can co-exist on the same IRQ and DMA
 channel [1] (and indeed this seems to be implied by the linux floppy driver -  
They should be able to. One of the bits in one of the output ports turns
off (3-states) the IRQ and DMA lines.
The UMC chip does get this bit right. I've had it co-exist with the
original IBM XT controller, and with a 3rd party clone controller with no
problems. Of coruse there might be controllers out there that don't
handle this correctly.
-tony