Thinking Machines CM-1 was Re: Pentium for Non-PC was 10 year rule blah blah blah

It was thus said that the Great Cameron Kaiser once stated: _The Connection Machine_ by W. Daniel Hillis contains quite a bit of infomration on the machine: The host talks to the processor/memory cells through a microcontroller. The purpose of the microcontroller is to act as a bandwidth amplifier between the host and the processors. Because the processors execute an extremely simple bit-at-a-time instruction set, they are able to execute instructions at a higher rate than the host is able to specify. Instead, the host specifies higher-level _macroinstructions_, which are interpreted by the microcontroller to produce _nanoinstructions._ It is the nanoinstructions that are executed directly by the processors. The instructions executed by the microcontroller that specify how this interpretation is to take place are called _microinstructions._ Thus there are four instruction sets to be kept straight: host-instructions (executed by the host), macroinstructions (interpreted by the microcontroller), microinstructions (executed by the microcontroller), and nanoinstructions (executed by the individual processor memory cells) ... Only the nanoinstruction set is described in this document. He gives an example though, of the macroinstruction: ADD 2000,1000, 8 ; add the eight bits stored in ; locations 2000-2007 to the eight ; bits stored in locations ; 1000-1007. generates the following sequence of nanoinstructions A-addr B-addr Readflag Writeflag MEM-ALU [1] Flag-ALU CC-flag Condition-sense ---- ----- -------- ------- --------- ------- ------ ---------------- 2000 1000 ZF [2] 1 A x B x F AB+BC+AC ZF 0 2001 1001 1 1 A x B x F AB+BC+AC ZF 0 2002 1002 1 1 A x B x F AB+BC+AC ZF 0 2003 1003 1 1 A x B x F AB+BC+AC ZF 0 2004 1004 1 1 A x B x F AB+BC+AC ZF 0 2005 1005 1 1 A x B x F AB+BC+AC ZF 0 2006 1006 1 1 A x B x F AB+BC+AC ZF 0 2007 1007 1 1 A x B x F AB+BC+AC ZF 0 [1] this is A xor B xor F [2] ZF = Zero Flag Each bit in the source and destination is addressed in sequene, starting with the least significant bit. These two bits are added together with the flag bit taken from flag 1, where it was stored on the previous cycle. On the first cycle there is no incoming flag, so it is taken from the zero flag, which is always 0. The zero flag is also used for conditionalization, which a COND-sense of 0, because this operation is to be performed by all the processing elements. The function for the memory is the exclusive-or function of the three inputs ... The flag is the majority function of the three inputs and is 1 whenever two or more of the inputs are 1. This sequence of nanoinstructions can be generated by the microcontroller by means of a simple macrocoded loop that increments the address of the memory locations. The machine as a whole is SIMD, and the programming examples in the book are in a form of LISP. He give the following path length algorithm: 1. Label all vertices with +inf 2. Label vertex A with 0. 3. Label every vectex, except A, with 1 plus the minimum of its neightbor's labels. Repeat this step until the label of vertex B is finite (This step takes one cycle, and the loop itself takes N cycles, where N is the path length between A and B). 4. Terminate. The label of B is the answer. And the code: ; find the path length between nodes A and B in graph G (DEFUN PATH-LENGTH (A B G) a(SETF (LABEL *G) +INF) (SETF (LABEL A) 0) (LOOP UNTIL (< (LABEL B) +INF) DO a(SETF (LABEL *(REMOVE A G)) (1+ (bMIN a(LABEL *(NEIGHBORS *G)))))) (LABEL B)) The "a" represents the "alpha" expansion, and "b" represents "beta reduction" (which can be loosely translated as MAP and REDUCE respectively). Hillis describes "a" as "Give me a zillion of these". The "*" represents an escape mechanism where by the alpha expansion is avoided if you already have a zillion of something. Some examples: a(+ *x 1) == (a+ x a1) a(+ (* *x 2) 1) == (a+ (a* x a2) a1) A = [A B C] X = [X Y Z] (CONS A X) => ([A B C ] . [X Y Z]) a(CONS *A *X) => [(A . X) (B . Y) (C . Z)] a(CONS A *X) => [([A B C] . X) ([A B C] . Y) ([A B C] . Z)] (b+ '{A->1 B->2 C->3}) => 6 (bAND '[T T NIL T]) => NIL (bMAX {1 3 5 7}) => 7 -spc(I do recomend the book---it's very informative)