17 Feb
2013
17 Feb
'13
8:42 p.m.
On 2013 Feb 17, at 4:02 PM, Eric Smith wrote:
Michael Thompson wrote:
I was wondering whether core rope was meant there.
Another place core rope was used was Wang 500 series calculators. The
microcode core rope ROM is 2048 words of 42 bits/word, so 86,016
bits. The address decoding involves a largish circuit board filled
with a solid bed of 2048 discrete diodes.
It is an interesting machine because it is
microcoded with read-only
core memory. I am not sure why they used core for the microcode.
Maybe
just a board with a bunch of diodes would have done the same thing
and
would have been a lot simpler?
Implementing the PDP-9 control store with diodes would have
required a fairly large board, as it would have needed locations
for 2304 diodes. Assuming that the microcode had an even
distribution of ones and zeros, it would have needed 1152 diodes.
I'm reasonably sure that using core was more compact and less
expensive.
In the PDP-9, each core of the core rope memory stores 64 bits,
unlike conventional read/write core memory, where each core stores
only a single bit. Core rope memory uses the core as a
transformer, and does not depend on the hysteresis loop of the core
nor attempt to change the direction of magnetization of the core.
There are 64 words of control store, so there are 64 wires. Each
of those wires goes through some of the 36 cores, and around
others. When a pulse is sent down a word line, in only the cores
that it passes through, it induces a pulse in a sense line.
The same general technique was used for the lowest-level control
store of the HP 9100 calculator, and the program store of the
Apollo Guidance Computer. IBM used similar technology for the
"TROS" control store of some System/360 processors and peripheral
controllers.