On Sun, 23 Oct 2005, "Peter C. Wallace"
<pcw at mesanet.com> wrote:
On Sun, 23 Oct 2005, Tim Shoppa wrote:
> Getting back to FPGA's, I know of a couple FPGA implementations of
> PDP-11's. (They are mostly KDJ11 clones, but they differ in a couple
> of tiny respects.) With extreme effort in the late 90's, they managed
> to make 4 FPGA's be about a factor of 2 factor on most benchmarks than
> a 11/93.
And the PDP-11 is much easier to implement than a VAX.
By the
time the FPGA implementations made it to market the PC-based
emulators were so much more cost-effective for most applications
(despite their warts of running under a host OS...)
I suspect that a FPGA implementation of a VAX would have a
performance about equal to a 11/780 if done by an average Joe.
Someone with much experience in caching/pipelining could probably
eek out a factor of 2x or 3x by pulling out all the tricks in the
book.
Tim.
Well since its pretty easy to get microcode to run at 75-100 MHz or so in
current cheap FPGAs, I'd say that 10 X a 780 should be trivial...
I'd say that's wrong. Considering that the VAX8650 microcode engine runs
at 68 MHz and manages about 7 times the 11/780, you're optimistic.
The 8650 have a very large microcode word, actually have three (or was
it four?) microcode engines running in parallell, and some very advanced
cacheing and pipelining to speed it up to get even that far.
Not sure, but my guess is that a lot of that sophisticated caching and
pipelining was needed to get the microengine to run at that 68 MHz because of
the chip-chip delays in a large multi-chip design.
Current cheap FPGAs can manage 75-100 MHz with no pipelining. They can
also do 32 bit adds/subtracts in < 7 or so nS. I doubt if the 8650s hardware
could manage that. Would be interesting to know the average number of
microinstructions per macroinstruction on the 8650...
Johnny
Johnny Billquist || "I'm on a bus
|| on a psychedelic trip
email: bqt at update.uu.se || Reading murder books
pdp is alive! || tryin' to stay hip" - B. Idol