I'd love to see one of the FPGA or CPLD wizards
out there whip up a
little "shim" that would sit between a 32Kx8 or 64Kx8 SRAM and provide
a sideband SPI interface to read/write that SRAM while still allowing
parallel access from the target system. It wouldn't have to be true dual
port and in fact this shim might also export a RESET signal that puts the
target system into reset when you started diddling things on the SPI side.
But with such a gadget, you could retrofit old systems with EPROM into
the new age of in-circuit programming.
This is not something hard to do and I've done that many times here.
EPROM emulators aren't hard things to do.
TTL-Tony-Duel-mode-of-doing:
- Bunch of counters on the parallel port, you send a pulse to increase
address, send 8 bits of data, pulse wr, keep it going to the end. Release
bus isolation and the memory is connected to the bus
?C-Alexandre-mode-of-doing:
- Microcontroller connects to the host via serial or USB port, gets
address and data, writes the address and releases the mem to the bus.
A day worth of work :)