25 Oct
2018
25 Oct
'18
12:02 p.m.
On Oct 25, 2018, at 11:48 AM, Al Kossow via cctalk
<cctalk at classiccmp.org> wrote:
You might be thinking of the AMT DAP, which used arrays of 1-bit processors. (32x32 or
64x64). 10mhz each. I have a 610, it is the most interesting SCSI peripheral I own...
- Josh
On 10/25/18 11:40 AM, Paul Koning via cctalk
wrote:
PDP-8/S
Saul Dinman's machine, who founded GRI
https://books.google.com/books?id=1jTUBwAAQBAJ&pg=PA52&lpg=PA52&…
Arrays of single-bit processors have been tried.
CHM has one, I'm blanking on the company name.
We had one in Apple ATG.
On Oct 25, 2018, at 1:45 PM, Chuck Guzis via
cctalk <cctalk at classiccmp.org> wrote:
On this subject, is there no interest in serial ALU designs? At one
time, if you wanted a low-cast implementation, that was the way to do
it. Also gives you a leg up on variable word-length designs.
Didn't at least one of the more popular MPU designs employ a serial ALU?
TMS9900?
Serial ALU as a cost saver for low end makes sense in discrete transistor or early SSI
machines, like the PDP-8/L.