On Thu, 6 Jun 2002, Cini, Richard wrote:
While browsing sites for 6800 information, I came
across this quote from
<http://wombat.doc.ic.ac.uk/foldoc/foldoc.cgi?Mostec>.
which talks about the design goals for the 650x in comparison to the 6800.
The design goal was a low-cost (smaler chip)
design, realized by
simplifying the decoder stage. There were no instructions with
the value
xxxxxx11, reducing the 1-of-4 decoder to a single NAND gate. Instructions
with the value xxxxxx11 actually executed two instructions in paralell, some
of them useful. <
Now, I didn't look at an opcode map, but it seems that this is an
interesting twist that I've never seen quoted when people discussed the
mysterious undocumented 6502 opcodes executing what appeared to be multiple
instructions.
Any thoughts?
That is indeed very enlightening. I'd always known about the
"undocumented opcodes" but never ventured to use them. However, this is
pretty much what I guessed was going on (though my hankering was not as
technically astute as the reality).
Sellam Ismail Vintage Computer Festival
------------------------------------------------------------------------------
International Man of Intrigue and Danger
http://www.vintage.org
* Old computing resources for business and academia at
www.VintageTech.com *
_______________________________________________
cctech mailing list
cctech(a)classiccmp.org
http://www.classiccmp.org/mailman/listinfo/cctech