Jim Battle wrote:
Tieing two threads together, he wasn't against testability of the system
-- the u370 was big on RAS -- but rather he thought functional
verification of the chip was the hard but right way to do things.
no argument from me (I plan to go get the book - does he talk about the
nano code?), but i'd add there's no substitute for good baseline
simulation also.
Just got done finding a problem in a fpga (bus clash) which should have
been caught in simulation but instead passed all the simple functional
tests and only crashed during full-up testing with the linux kernel.
(and naturally everyone blamed the linux kernel :-) 'cept me)
-brad