7 Jan
2005
7 Jan
'05
5:13 a.m.
Hi
If you look at Al's spec page, see 017_MC715 or page 18.
It states:
Each may be used independently, paralleled for increasing
the number of inputs ( subject to loading rules), or
cross-coupled to form bistable elements.
So, as you can see, it was allowed to tie outputs together
with some restrictions.
Dwight
From: "Steve Thatcher"
<melamy(a)earthlink.net>
I don't see how doing a wired-and is possible when RTL includes a pullup
resistor on each output. You would get to a point where an individual output
transistor would not be capable of sinking all the "low" current.
You can get a basic idea of the logic families here...
http://www.asic-world.com/digital/gates5.html
best regards, Steve Thatcher
-----Original Message-----
From: "Dwight K. Elvey" <dwight.elvey(a)amd.com>
Sent: Jan 7, 2005 12:22 PM
To: cctalk(a)classiccmp.org
Subject: RE: RTL Logic
Oops!
I forgot one thing. You can put several RTL outputs in
parallel as a wired AND. You can't do that with the
general CMOS or TTL. You'd need to look out for this.
Does anyone have a source for DTL parts. There are
a could I've been looking for.
Dwight