Allison wrote:
Subject: Re:
PDP-8 /e/f/m memory
From: Don <THX1138 at dakotacom.net>
Date: Wed, 16 Aug 2006 11:41:47 -0700
To: General Discussion: On-Topic and Off-Topic Posts <cctalk at
classiccmp.org>
I thought I'd said that. Bit of work
history, engineer and product
engineer for a semi company that sold micros and ram.
Work history doesn't
help list readers since they can only read
what you've *written* (except for those few clairvoyants sitting
in the back row...) :>
Most will not build unless supplied as a kit for $49.95.
Presumably, (*some*) people may still be *interested*
or want to *learn* something -- even if they are not
going to *build* it.
You neglected
to note that Icc grading *between* CMOS static
RAMs AT DC varies SUBSTANTIALLY. Power consumption at operating
frequency isn't an issue (here). Rather, the difference between
Icc(standby) on a "regular" 62256 (e.g.) and a "low power"
62256.
Yes, I know. Does anyone care?
Anyone who is thinking about the problem (e.g., "miniature
PDP-8" thread) may.
You can buy
even LARGER devices (e.g. > 1MB -- B not b)
that will idle at *2* uA.
I.e. the data retention time of a well designed BBSRAM
circuit *is* limited to the shelf life of the battery
powering it (during standby). *But*, only if you select
the right grade SRAM.
At 2ua a 3V 30mAH Li cell has a life of how many years?
At 20ua a 3V 30 mAH Li cell has a life of how many months?
At 2ma using two AA alkaline cells (Duracell) in hundreds of hours?
The point was, design a good BBSRAM circuit, put an off-the-shelf
"consumer battery" on it and it will last the shelf life of
the battery.
Keep that item out of nasty environments -- which would also
be harmful, long term, to your '8 (or whatever) and you have
a nice, simple, solution.
In my reread
of your comments, I don't see *that* mentioned. :>
(much of the 32KB devices you'll find in PC's and their ilk
are not chosen for this very low Icc(standby) -- *especially*
cache RAM!)
Doesnt matter! if battery life were an issue I'd have brought
it up. However I specifically metnioned in another post that
battery life or even battery backup was not an issue.
Sorry, I didn't see the sign that proclaimed "This is Allison's
post; only replies that she deems acceptable are accepted here" :>
*Other* people may be interested in this, even if you are not.
My apologies if your thread has become intertwined with the
"miniature PDP-8" thread. But apparently there *are* people
interested in different approaches to semiconductor memory
in a PDP-8 -- or mini-PDP-8.
FYI: nearly all the previous commercial designs the
ram array
was usually 2102s and even the LP version at DC was both heat
and power intensive. Their power drain was measured in amps
for the array (96 2102s for one board). B elieve it or not
they did provide for backup (using large SLAs).
I'd point out that I have a bag full and some are very low power
I measured several for this and got less than 1ua at 3v and room
temp, outputs floating inputs grounded CS/ and OE/ negated. You
forget guarenteed specs vs whats likely supplied as yeild is often
I only design for worst-case. The numbers I have previously
cited are actually *worse* than worst case. But, they vary
greatly from manufacturer to manufacturer. E.g., Cypress's
super low power 62256's idle at 1/20th the power of Hyundai's.
If you are building "one off" and can afford to select parts,
then perhaps you could chose to pick one manufacturer's
parts over another. If I were designing a *kit* and
expected some volume of sales, I would opt for the real
worst case, vendor independant approach which means some
folks would get pleasant surprises, others would get what
they paid for.
But, we already know *you* aren't interested in this. :>
to the better part. That was only the CMOS cache rams
pulled
from old 486 boards of late generation (green). I have a very deep
new parts stock with a tubes of graded 62256 and other
low power rams as well as CMOS logic.
Great! Build it however *you* want! Since it is *yours*.
To put things
in perspective, a 1F supercap charged *nominally*
to 5V (use care here since supercaps typically don't have much
margin for overcharge :>) would discharge to 2V (the typical
data retention voltage of a CMOS SRAM) in just 3000 *seconds*
(less than an hour) with a 1mA retention current. This could
be extended to ~30hours using 25uA devices. Using a *2*uA
device can extend this to 2.5 weeks...
Read that as a battery would do far better.
I mentioned the numbers for a supercap as a delayed reply
to someone's *explicit* question about it. It was a great
way to put the numbers "in perspective".
Good luck with your design!