19 Mar
2012
19 Mar
'12
4:08 p.m.
On Mon, Mar 19, 2012 at 11:37 AM, David Riley <fraveydank at gmail.com> wrote:
Probably NOPs... I think double access would gum up the innards of the
chip and require it be reset.
On Mar 19, 2012, at 12:33 AM, Ethan Dicks wrote:
I thought it had a very tiny FIFO on receive (maybe 2 or 3 deep?). ?I'm
pretty sure the "enhanced" SCCs (85230 and up) had larger buffers.
I think the 85230 does. I don't remember there being any sort of SILO
in the 8530, but there may have been a latching register so you could
drop in "the next byte" while the old byte was still going out. I'm
not positive it has that, but I'm reasonably certain that it has
nothing more sophisticated than that.
- Real Z8530s (or second-source replicas)
- Real AM85C30s
- An AMD 85C80 (an unholy hybrid of an AM85C30 and a 53C80 SCSI
controller; I have some in my various LCs)
That looks like a fun one. There are places I would have liked to see
that in the late 80s/early 90s.
As far as I know, none of these were enhanced parts.
?The Mac OS kept up
with them OK, though I certainly recall LocalTalk taking up significant
processor time on local machines because the 68K architecture didn't
really "do" DMA (among other reasons).
Right. Our board had no DMA engine. We ran up to 128Kbps sync serial
with an 8MHz 68000 doing all the packet assembly/breakdown and USART
stuffing.
One thing that
complicated _our_ design was that we started using the
Z8530 very early in its evolution,... ?We had to inject wait states (via
registered PALs and /DTACK, IIRC)...
The original Mac had the same issue, it would seem; there are bits in
the original Inside Macintosh which warn that if you absolutely must
talk directly to the SCC instead of using the Toolbox drivers, you need
to add NOPs to the access (or access twice, I don't quite recall). The 68000 had an interesting 6800 bus emulation mode
for accessing
legacy peripherals at around 1MHz. ?I'm not sure if the original Mac
used it, but there's a simplified one-page schematic on folklore.org
somewhere if you wanted to find out. ?Do you know why your company
didn't use that? ?Or if so, why it didn't quite work?
I know of that mode, but I'm not sure we were using it. We started
making 68000 peripherals in 1981 - the first prototype was made before
we got a chip in hand. The original socket was 0.6" wide because
nobody noticed the 1" dimension on the preliminary spec sheets. Once
the first processor showed up (XC68000 w/ S/N 424 hand engraved on the
lid), I heard they had to make a mechanical adapter to fit the CPU
onto it. By 1985, the team had learned more about the 68000, but
since there were a variety of /DTACK-delaying peripherals on the
original board (like the Unibus DMA engine to move buffers in and out
of host memory), one more chip with a custom /DTACK term wasn't the
end of the world, plus they could tune it to match the 4MHz speed of
the early 8530s and not run it off of the E clock at 1/2 or 1/4 speed.
I don't know if they even tried using the E clock, so I don't know if
it was tried and failed, but with such a complex design they probably
just wanted to stick with the technique that was already in use. I
know a bit of the whole "DTACK Grounded" saga, and our design was far
too complicated to even think about that as a solution.
-ethan