Dynabyte Memory board in Northstar Horizon debugging

Not to suggest it's the possible problem area, but here's one route of examination: On such boards, there are two areas of logic specific to writing, the write-enable logic and the data-output-lines logic: - The write-enable logic distinguishes a read-vs-write request from the S100 bus to control the Write pin on the RAM chips. - The data-output-lines logic takes the DO0-DO7 data signals from the S100 bus and distributes them to the Data-Input pins on the RAM chips. From the symptoms you present, it sounds like the write-enable logic is working but there may be a problem in the data-output-lines path, common to all 8 bit lines. You might try confirming that the Write pin on the RAM chips is getting an appropriate assert pulse when a write to the board/bank is performed. Then look at tracing the signal path of the DO0-7 lines from the S100 bus through to the RAM chips, you can expect an (8-bits) buffer or latch along the way (I can barely discern 8T97 and '373 chips in the board pic), and checking those ICs and the enable-signals they require. Note there will be a similar buffer/latch for the read path from the RAM data-output pins to the S100 DI0-DI7 lines, so you want to distinguish the ICs used for read vs. write. I don't know how far you'll get with a logic probe, a scope would be helpful. (Don't forget the sanity check for all the proper power supply levels at the RAM chip pins. Those look like they are likely 4116 RAM chips, there are 3 power supplies). You might try grabbing the schematic for a similar S100 64K dynamic RAM board (that is, one using the same RAM chip) from http://www.s100computers.com/Hardware%20Index%20Page.htm to get an idea of the basic logic configuration for such a board. (I have to plug www.s100computers.com here, it's a great resource for S100 board manuals, and has been very helpful in working on several S100 machines.)