Sparc desktop vs x86 desktop

I like the first sentence for the analogy -- not so fond of the second. Particularly for the deeply pipelined later x86en, individual pipeline steps are fast (thus "revvy" I think is apt) but it suffers like any pipeline from bubbles due to bad branches and so on, and being deeply pipelined suffers more. SPARC, and particularly POWER/PowerPC, can't rev clock speed like that because each step of the pipeline is doing more, but their shorter lines are more resistant to misprediction. Chips like the G4 also can be made very power-efficient because you're not grinding clock. It's more of an efficiency question than a load tolerance question, IMHO. <OT> As an example of how to do this wrong, the G5, which tried to ramp up clock by adopting Intel's approach, became a power hungry monster (as I listen to my Power Mac G5 quad whine) and I'm sure directly contributed to Apple going Intel since the G5 could never have made it into a laptop as originally designed. The nadir of Intel's fascination with super duper pipelines was Netburst and putting all their eggs into ramping up clock speed and building better speculative logic. This did pay off in marketing, but given their switch to Core, Intel appears to have realized that NetBurst was not sustainable. Indeed, the pipeline is half the size of Prescott's. </OT> -- ------------------------------------ personal: http://www.cameronkaiser.com/ -- Cameron Kaiser * Floodgap Systems * www.floodgap.com * ckaiser at floodgap.com -- Heisenberg may have been here. ---------------------------------------------