I've been curious as to more precisely how the
timing was accomplished in that
(those) machines. Offhand, I suspect you still end up with delay elements in
the design at various points to ensure some group (worst case) of signals/paths
are all ready/stable at some point and you end with a more-or-less 'effective
clock rate' anyways and don't gain much.
Such all started with ENIAC didn't it?, which - based on what I've been able
to find/read - could be described as an async design.
Was async still being discussed in the 60's?
The first PDP-10 (KA-10) processor is complete async. It also seems to
me that the PDP-9 processor is syncronous, but its clock cycle is
derived from a bunch of one shots that kick each other in a circle, in
a very async fashion. At least that is what I was told by the RICM
guys.
--
Will