28 Nov
2016
28 Nov
'16
8:33 a.m.
On 11/28/16 7:11 AM, william degnan wrote:
And what does the TU58 bootstrap do when you attempt to boot? Do you
see any activity over the second SLU talking to the emulator?
If you really want to make a bootable XXDP TU58 tape image, the
instructions given by AK6DN here:
http://www.vcfed.org/forum/showthread.php?42246-How-to-make-
a-bootable-XXDP-file-for-TU58-emulator
this is what I have been doing.
<snip>
this just bombs, does not run. I agree though. basically the computer
says "I can't reach the controller"
No it doesn't say that. As
indicated by the fact that you can see the
controller's CSR register from the front panel and the console PROM
monitor, and that the bootstrap is able to write to it during
execution. The controller is responding, and it's saying "sorry, I was
unable to read anything." If the controller wasn't responding, the CPU
would trap on execution (a Bus Error Trap, to location 4).
I use both the M9312 DL ROM and manually entering in the bootstrap without
the M9312 installed (replace with terminator card). With the ROM method
the system repeats an attempt over and over.
system is looping between instructions 173022 -->173156 (error reset the
world), 173160 (retry)..back to 173022
When I first power on the values in the control status register (774400)
are good. 1-6 and 8-13 are cleared, bit 7 is set.
After I attempt to boot (DL at the @ prompt), you can see the light
pattern
repeat over and over, looping through 173022 -->173160.
I HALT the system and recheck the control status register. This time
15 - error (composite error (ERR))
10 - EO (operation incomplete (OPI))
7 - stays lit
function code F2 = 1, F1 =1, F0 =0. this code indicates "HFT" (Header Not
Found)
To me (and this is just me) the bootstrap is not waking up the RL11
controller, and can go no further.
According to the user's guide: http://bitsavers.trailing-edge
.com/pdf/dec/disc/rl01_rl02/EK-RL012-UG-004_RL01_RL02_
Disk_Subsystem_Users_Guide_Oct80.pdf
If the CSR bits are as you report, the drive got the Read command (that's
what F0-F2 indicate -- the last selected function, in this case "Read
Data"). Bit 15 indicates a composite error, and bit 10 indicates OPI, as
you note. I don't see anything in there about HFT unless you left out some
bits.
If indeed bit 12 is set (indicating HFT) then the "Header Not Found"
indicates that the drive was unable to find the header for the sector on
the disk, which makes it look like the drive is trying to read but for
whatever reason isn't able to find the sector. This could be a damaged
disk, misaligned heads, or any number of logic failures.
I would start with the RL02/RL11 diagnostics via either XXDP or PDP11GUI
and go from there.
I should add that the RL ROM (run DL0
from CONSOLE prompt) keeps trying over and over again, you can see it. If
you run the bootstrap from the front panel it just dies.
Yes, this is expected. If
you look at the listing here:
ftp://ftp.bluefeathertech.com/computing/hardware/legacy/DECboot/23-751A9/23…
you can see that what happens on an error after a Read Data command is
that the bootstrap does a RESET and jumps back to the beginning to
retry, indefinitely. (See line 91). There is likely a problem with
your drive, the controller, the disk, or the cabling, or some
combination of these things.
What I can do next is make more note of the registers, see if I can get
more clues.
Yes, that might be a good idea. Single-stepping through the bootstrap
(with the aforementioned listing at your side) might be revealing. I
assume you've run all the 11/40 CPU diagnostics and exercisers?
It just seems to me that there is a CPU or UNIBUS issue when I see
performance like this, again my hunch. It's not the controller. If the
disk was bad, it'd at least try something, you'd see something.
You are
seeing something, in the controller's CSR register. What is it
you're expecting to see?
- Josh
b