Tony Duell wrote:
...
UK PAL video equipment used to use a glass delay
line as part of the
PAL decoder. This was a 'mechanical' device -- piezo-electric
transducers sent a pulse through the glass which was picked up about
64us (a little less -- just under 1 line time) later by a similar
transducers. Old VCRS -- the better ones anyway -- used a 64us
(exactly 1 line time) delay line to store a video line to be used if
there was a dropout on the tape. Modern ones don't seem to bother :-(
I have often wondered about using such delay lines for data storage...
Back in the early 70s at Oregon State University, there sat a "home
built" (using Naval Research funding) computer called "Nebula." (You
can look it up - it's in many of the online histories/chronologies)
Its memory consisted of 4k by 34 bit (yes, 34 bit) words made from
Corning Electronic Devices glass delay lines (part number 853302.)
These delay lines were 100us devices and, at about 27mhz bit rate, we
stored around 2k bits per device. This resulted in 64 words of
storage per card, so with 64 cards we achieved a whopping 4k words (16
kbytes) of storage.
It was all DTL logic driven (as was most of the computer at that time)
built from your basic 2n3406 and 2n3407 transistors, if memory serves.
I fooled around with this machine from 1970 through the mid 70s,
getting its small drum offline storage working and adding a few
instructions, general maintenance etc. as well as writing a bunch of
software. When computer time on this machine was "free" relative to
the $300 / hr on the "big iron" it was an easy choice.
The memory was quite reliable, not temperature sensative and would
retain its contents indefinitely (as long as power wasn't removed, of
course.)
The 34 bit word layout consisted of 32 "numeric" data bits, plus a S
("spare") and P ("parity") bits. The 34 bits were all part of the
programmer model. The "parity" bit was misnamed, since it really
never was involved in a word 'parity' check and the "spare" bit
wasn't
really a "spare." Both were testable and setable but not involved in
numeric or logical operations. The only changed on store and explicit
set/clear operations.
The machine also had 2k similar size words, made from basically the
same glass delay lines, but organized as a content-addressable
memory. The CAM was not usable as program storage, but you could
store data there, after a fashion.
As I said, the memory worked well and including the drivers and timing
controls, was a comparable volume to core memory of the time. Of
course, it was slow and serial (imagine a drum with a 100 uS rotation
rate.) But since the machine itself (at the outset) had a 100uS cycle
time, it was still "relatively" fast.
We later (mid 70s) replaced the glass memory with a core storage
module from a Stretch compute (OSU received a Stretch - minus CPU
alas) and Nebula got one of it's core modules. This resulted in 32k
words of storage with a cycle time of a few microseconds.
Unfortunately Nebulas core control logic wasn't up to that speed (it
was a serial computer by nature) so the best we ever got was about 30
uS word time (and that was pushing it a bit.)
Short answer, glass was quite reliable. I still have one of the
modules from the machine (after it was "decomissioned" for the core
changeout) and want to build a small demo memory with it some day.
Only wish I had enough to build a reasonable size machine...
-Gary
-tony
Gary,
Are there any pictures of nebula? I fondly remember you giving me the
grand tour back in 1975?, of nebula, sitting across from the PDP-9,
the CDC 3300, your music composer program and the cyber running
lander. Thanks for the memories. ;-)
Cheers,
Jim Davis
I'm currently writing post silicon validation tests at intel for the
IXP2800 network processor, an architecture that was developed by DEC
at Hudson before GQ palmer kill our baby. It's a mainframe class system,
I wish it wasn't targeted at network solutions.