On Jul 24, 2014, at 10:22 PM, Eric Smith <spacewar at gmail.com> wrote:
On Thu, Jul 24, 2014 at 4:21 PM, Tony Duell <ard at
p850ug1.demon.co.uk> wrote:
[1] The VAX11/730 also loads the CPU microcode at
power-up, but from what
I rememebr, ther eare some hardware features that optimise it for the VAX
instruction set. While it is possible to give it a differnet instruciton
set, I think it wopuld be a lot less efficient.
All of the microcoded processors DEC designed, whether they had
loadable microcode or only ROM, had hardware that was substantially
oriented toward the normal DEC macroinstruction set(s), and would have
been very inefficient at implementing other instruction sets. The
VAX-11/7xx series hardware was designed for efficient execution of
both VAX and PDP-11 instruction sets, but the other machines were
designed for a single instruction set only. Even the machines that
officially supported user-written microcode (PDP-11/03, PDP-11/60,
some VAXen) were generally unsuited to implementing entirely different
instruction sets, and user-added instructions were expected to have
similar structure to standard instructions.
That?s probably pretty accurate, but even so, it was well know around DEC that the
PDP-11/60 was the world?s fastest PDP-8. (The WPS-8 development team, which was right
next to Typeset-11 where I started, used an 11/60 for their development work.)
paul