gauging interest in VAX 6000-530

Chris Kennedy wrote: Mike: you wanted numbers. The 11/780 is one machine on which I do have a few recently acquired docs. In page 2-2 of the 1977-78 VAX 11/780 architecture handbook there is a nice figure of the cpu and different interconnects. Basically, the cpu, main memory and I/O subsystems were tied to the Synchronous Backplane Interconnect (SBI), 13.3 MB/s, cycling at 200ns. The console was attached to the CPU directly thorugh a separate channel. Any device could request control of the SBI and control was granted using a priority scheme. The I/O subsystem could hold one unibus adaptor (1.5 MB/s) and up to four massbus adaptors (2MB/s each). The cpu had 8KB of two-way set-associative write-through cache (and the instruction set allowed for generation of very compact code). The cache monitored I/O <=> main memory transfers and updated accordingly. Given this architecture, I think that there is reason to assume that an 11/780 might service 100 users over serial lines faster than any 486-66 PC . Just think of the interrupt service overhead of 100 users typing simultaneously, even with 16 byte FIFO buffers. By the way, this little book is great reading... It really puts things in perspective to see the great 11/780 implementation 22 years ago... Carlos. -- Carlos Murillo-Sanchez email: cem14(a)cornell.edu 428 Phillips Hall, Electrical Engineering Department Cornell University, Ithaca, NY 14853