20 Oct
2016
20 Oct
'16
2:21 p.m.
On 10/20/2016 04:27 PM, Paul Koning wrote:
I would treat this as an analog problem, putting some
op amps and comparators to work. It doesn't seem to rise to the level where D/A
devices are needed. :-)
Clearly op amps and comparators could do the job, probably really
nicely, but it seems like you'd end up with a rather large and expensive
bus interface. I've wondered if this might be solvable with just a
couple FETs. I'm thinking something like in this schematic.
http://pdp10.froghouse.org/qsic/drivers-drivers.pdf
The resistor to the base of the driver FET is to limit the slew rate
(depending on the gate capacitance of the FET and maybe current limiting
from the FPGA). An appropriate FET would have to be
found, having the
right threshold voltage to meet the receiver spec, also a small
enough
gate capacitance (one friend suggested that a series resistor on that
side too might help with that).
Right. I meant an existing non-MSCP non-RL device.
Most other disks have extremely straightforward register command sets; RK05, RP06, the
details differ but the general approach is very easy.
I'd planned to implement an RK first, followed by an RP. I didn't
realize the RL was any more complex than those but I'll come asking
questions of you if/when I get to that.
Any non-DEC disk would be a problem. Writing drivers
is a pain if it's even possible; for some operating systems like RSTS it flat out
isn't supported.
Our plan was to first emulate the DEC disk controllers as closely as
possible. Well, as closely as people tell us is necessary (like, do we
have to insert delays to slow our "disks" down to match the real
ones?). Then we'd have options for various extensions like 22-bit
addresses and larger disk sizes for those people who were able to take
advantage.