28 Aug
1999
28 Aug
'99
6:16 a.m.
Richard Erlacher wrote:
I've taken a good hard look at implementing the
6500 core in XILINX and find
that performance, which is VERY much of interest, is impacted most by ALU
design.
No-one has mentioned the free IP project at <http://www.free-ip.com/>
which has a VHLD implementation of a 6502 now available. No idea of
performance on this, I have just begun to dabble in this area.
I too bemoan the fact the full configuration specs are not availble for
the FPGA's.
A few years ago I was working for a company that had a Xilinx part
monitoring a processor bus. We wanted to dynamically reconfigure the
FPGA so that we could change the bus pattern it triggered on - no joy
though geting the necessary info.
I see implementing old processors in FPGA's as a way of preserving those
the design of those processors. Yes, we would all prefer to have an
original, but practically speaking that is not possible.
For some uses, a modern re-implementation or an emulator is better than
nothing at all.
Regards
_---_--__-_-_----__-_----_-__-__-_-___--_-__--___-__----__--_--__-___-
Hans B Pufal Comprehensive Computer Catalogue
<mailto:hansp@digiweb.com> <http://digiweb.com/~hansp/ccc>