Chuck Guzis wrote:
Philip, it sounds like an interesting project.
However, I've got an
itch in my brain that I can't seem to scratch. If you're doing bit
transition timings, why even bother to have an AM detector or data
separator? You can do all of that in software. Are you restricting
your design to MFM and FM encodings?
Oh, no, not at all. The reason I added the data separator and sync detector
was primarily because of Amiga format floppies. The track starts with a pair
of $4489 sync words, and isn't synchronised to the index pulse. It just makes
it easier to decode the data - if you know where the sync word is, you know
where the SOT is, so you know where to start decoding data, which bits are
data and which bits contain clocking information.
If the disc doesn't use the $4489 sync word, you start reading at the leading
edge of the index pulse, run one revolution, then stop reading at the second
trailing edge. That leaves you with a RAM full of undecoded MFM data, that you
can sync against manually. The sync detector lets you skip the synchronisation
stage for discs written as an entire track - just take every second stored bit
as a data bit.
I'm quite tempted to make the sync word configurable, so you could sync on any
8-bit MFM sequence you liked. I know there's at least one other 'missing
clock' sync word in common use (IIRC it's 0xC1 with a missing clock in the
second nibble).
The other 'interesting' bit is going to be handling read/write for
hard-sectored discs. Reading shouldn't be too hard - AIUI, you'd wait for an
index pulse, start reading, then wait for N+1 index pulses (where N=number of
sectors -- n+1 provides one sector of overlap) and stop. Storing the index
pulse state in the MSbit of the counter value byte would let you seek for a
sector. The index pulse would need to write the current count to RAM and zero
the counter every time an index was detected, otherwise writing the data back
would be pretty difficult (the index->sector data timing skew would require
correction).
Writing back would involve a bit of 'fun' involving a primitive state machine.
Probably something along the lines of checking to see if the MSbit was a 1,
and waiting for an index pulse before sending the pulse and decrementing the
counter.
I can foresee all this circuitry filling two or three separate CPLDs...
BTW, Chuck, thanks for posting the floppy drive pinout - it was very helpful.
Thanks,
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