Megan wrote:
From what I
understand, the 11/73 and 11/83 are both J-11 cpus, the only
difference being that the /73 runs at 15MHz and the /83 runs at 18MHz.
The issue is that there's NO SUCH THING as an 11/84 cpu card, since
11/84 systems use an 11/83 (ie qbus) cpu with a Qniverter to convert to
UNIBUS.
Back when we were working on the changes to RESORC to correctly report
the various types of KDJ-based machines, it was explained to us (in
RT-11 development) that a dual-high KDJ11-A was simply reported as an
11/73. The KDJ11-B (running at either 15Mhz or 18Mhz) using normal
memory was to be referred to as an 11/73B. A KDJ11-B (running at
either 15Mhz or 18Mhz) using PMI memory was to be referred to as an
11/83.
Jerome Fine replies:
I just tested some real DEC PDP-11 Qbus systems.
RT-11 reports (using RESORC.SAV) when the following are used:
M8192-YB dual 15 MHz (KDJ11-AB) as: PDP 11/73A Processor
always - PMI memory is not recognized
M8190-AB quad 15 MHz (KDJ11-BB) as: PDP 11/73B Processor
when used with normal memory or PMI memory below the CPU
M8190-AE quad 18 MHZ (KDJ11-BF) as: PDP 11/73B Processor
when used with normal memory or PMI memory below the CPU
M8190-AB quad 15 MHz (KDJ11-BB) as: PDP 11/83 Processor
when used with PMI memory above the CPU
M8190-AE quad 18 MHz (KDJ11-BF) as: PDP 11/83 Processor
when used with PMI memory above the CPU
I have, at times in the past, had a PDP-11/93 board, but found it was
too expensive to justify keeping one of my own since it was not
much faster (only about 10% based on my own specific tests) than
a PDP-11/83 system. I seem to remember that V5.06 of RT-11 was
finally able to recognize the PDP-11/93 processor as opposed to
V5.05 of RT-11 which was released in October 1989. As for the
real advantage of the PDP-11/93, with all 4 MBytes of memory
on board and 8 serial ports, it effectively replaced 4 quad slots
with just ONE quad slot.
What Megan Gentry has stated is correct, although I note that the letter
"A" is present when the dual M8192-A boards are used. Also, I am not
absolutely sure about "M8190-AE" for the KDJ11-BF CPU since the
system is buried under a table and many cables and I could not get
close enough.
As for mention of a PDP-11/74 within this thread, no such system
was ever built that was a parallel to the PDP-11/83 vs the PDP-11/84,
i.e. using an M8190-AB (KDJ11-BB) in a backplane with a special
Qbus AND a Unibus.
In actual fact, there were a number of PDP-11/74 systems built which
consisted of at least 2 PDP-11/70 systems running in "conjunction"
with each other and sharing resources, probably memory. I believe
there was even at least one additional instruction added or at least
an enhancement of an existing instruction to allow "co-ordination"
between the different PDP-11/70 CPUs within the PDP-11/74
configuration. It is said that none ever left DEC, but there have
been rumours that one was sent to Ontario Hydro - I have never
been able to confirm that rumour. John Wilson has speculated
on the possibility of using a Pentium 4 with hyperthreading to
emulate a PDP-11/74 under Ersatz-11 (see below).
Six other points should be noted:
(a) There are at least 4 and maybe a few more revisions to the
actual J11 CPU chip. I have seen 04, 05, 08 and 09 if my
memory serves me correctly. I am fairly confident that the
KDJ11-BF boards currently "REQUIRE" at least the 08 rev
and probably the 09 rev of the J11 chip to run at 18 MHz
along with a 05 rev for the FPU chip on the KDJ11-BF.
These rev numbers may be incorrect, but that is my best
guess. Unless there is some incentive to actually pull
the KDJ11-BF out to check those numbers (at great
effort), that is my best recollection. No one else seems
to have mentioned the large numbers of J11 rev levels
and perhaps only a very few are aware of this fact?
My most basic question is about the speed that the
different rev levels of the J11 chip were able to be
run?
(b) The different rev levels for the J11 CPU chip were
needed due to reasons which only DEC might wish to
reveal, but some reliable stories are spoken of a bug
with the floating point instructions using early rev levels
with the KDJ11-BF and the 18 MHz clock speed.
In addition, since the PDP-11/93 CPU boards were
run at 20 MHz, these PDP-11/93 boards probably
required a specific rev level as well?
(c) I have also heard rumours that DEC (or a contract
company) developed a much faster CPU, but it was never
brought to market - possibly due to perceived competition
against the MicroVAX II systems. A company by the name
of Harris was mentioned in the mid 1980s.
(d) A number of other companies developed MUCH faster
CPU chips including QED (Quickware Engineering Design),
Mentec and Strobe Data. The last company originally used
the J11 within a PC and later developed their own.
(e) It is possible to run PDP-11 code even faster. While
the SIMH emulator which is written in C can run PDP-11
code much faster than a real PDP-11 and Charon-11 is
likely also reasonable (although reports I hear are that it is
not only very expensive, it also has a number of problems),
Ersatz-11 is most likely the least expensive commercial
version (as well as there being a free non-commercial hobby
version) which can run at about 60 times faster than a real
DEC PDP-11/93 on a 3.0 GHz Pentium 4 CPU under
Windows 98 SE. In this respect for Ersatz-11, I have
personally seen CPU speeds of about 15 times a real DEC
PDP-11/93 on a 750 MHz Pentium III for the CPU and
50 times disk I/O when using ATA 100 EIDE hard disk
drives as compared to RD53 disk drives. Obviously the
disk I/O ratio is not as high when compared to much faster
SCSI and ESDI drives. But using the newer SATA 150
drives would be able to improve that disk I/O ratio without
any change to any of the emulators.
It was my understanding that the standard KDJ11-B was
also the heart
of the 11/84 machine (and could be distinguished from the QBus
*system* due to a UNIBUS bit in one of the registers). I have heard,
though, that only specific revisions of the KDJ11-B board could be
used in the 11/84 system.
See (b) above.
I am willing to be corrected, however... though my
experience tells
me different.
Can Megan Gentry provide any information about a floating
point bug for the KDJ11-BF? Also any information about
the different rev levels of the J11 CPU chip? Or does anyone
else know of the reasons for the different rev levels of the
J11 chip, let alone what specific changes were made?
Since I scavanged one from parts in the hallways of
the Mill back when
the RT group was on ML5-5, I simply grabbed parts and put an 11/84
together and it worked fine with what I had (and in fact we used that
machine to do the unibus map support for the RT-11 device handlers
back when we put that support in -- I remember specifically working
on the DEUNA/DELUA handler)
With reference to your luck about putting the parts
of a PDP-11/84 together with the correct memory,
perhaps you had some help or maybe the memory
was already inside the backplane. After all, it could
not have been used anywhere else, so it might well
have been just left in the backplane and been there
when you "grabbed parts".
Also, can you provide any insight as to why DEC
stopped development on PDP-11 CPUs when
other companies provided faster CPU chips much
later than when DEC stopped?
If there are any other questions, please ask!
Sincerely yours,
Jerome Fine
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