Besides, wasn't the Rockwell chip the improved
version of the original
(MOS) 6502, called the 65C02? It had some nifty extra instructions and
an extra addressing mode..
That came later. Rockwell was one of the original second-source
manufacturers of the NMOS 6502, with no added instructions. Synertek
was another. Contrary to popular belief, Mostek *NEVER* made any 6502s
or related parts.
Rockwell made a line of single-chip microcontrollers based on the NMOS
6502 core, starting with the "6500/1" (that's the full part number,
it's
not a 6500 or 6501). On some of these parts they added an extra set
of bit manipulation instructions, using opcodes of the form xxxxxx11,
all of which were undefined on the original 6501 and 6502. Some friends
and I did a lot of work with the 6511Q, a ROMless part with a lot of nice
on-board I/O features.
When Rockwell licensed the CMOS 6502 from WDC, they added their bit
manipuation instructions to it. Thus the Rockwell R65C02 has more
instructions than the "standard" 65C02 from WDC, GTE, NCR, and others.
Their later single-chip microcontrollers were based on the CMOS core.
Rockewll put a preliminary blurb sheet for an R65C29 in one of their data
books, but unfortunately never introduced the part. The 65C29 was
described as containing two R65C02 processors. Internally, though,
it was to be a "double-pumped" design. It would have had two complete
sets of registers (A, X, Y, P, S, PC), but only one set of logic, and
switched between the two contexts on alternate clocks. Conceptually
similar to the "barrel processor" approach of the PPUs on the CDC 6600,
except that the PPUs each had their own memory while the 65C29 would
have shared the same memory for both contexts.
This technique is used in several proprietary microcontrollers, and in
at least one new commercial microprocessor due out in 2003. A related
technique is used by Intel for their "Hyperthreading" in the Xeon.