26 Apr
2016
26 Apr
'16
12:18 a.m.
-----Original Message-----
From: cctalk [mailto:cctalk-bounces at classiccmp.org] On Behalf Of Maciej W.
Rozycki
Sent: 26 April 2016 00:42
To: General Discussion: On-Topic Posts <cctech at classiccmp.org>
Subject: RE: AlphaStation 200 NVRAM Problem
On Mon, 25 Apr 2016, Robert Jarratt wrote:
I suspect not, but will give it a go.
To help me work out why my program isn't
working I went back to the
console command to try to write to the flashbus index register, I used
the following
command:
deposit -l pmem:100000000 94000000
This should set up the flashbus register to write to the LEDs. Instead
I got a machine check and an "Illegal target address".
Hmm, I wonder if:
>>d -l -physical 100000000 94000000
would make a difference. I guess not, but probably worth checking. Am I misunderstanding the technical manual? Are
those addresses it
gives for the flashbus registers physical addresses?
I'm sure they're physical (see Chapter 3 too).
One possibility is SRM unmaps them when it takes over from SROM, for
safety maybe -- so as not to let one corrupt flash by accident easily recommend write-protecting flash with its jumper for
these experiments --
with DROM not working correctly and hence no way to load SRM from a
floppy you'd be doomed if flash broke too). The symptoms should look like
ones you've got, though of course plain poking at the wrong area would
look
the same.
I will check for unmapping, but I get a machine check when I write code
running in OpenVMS that attempts to write to the same physical location.
This assumes my code is correct of course, which is what I was trying to
verify by using the console.
This makes me wonder if the problem is that the DROM is getting the same
errors. But I am not sure if that can be true because then the DROM would
not be able to write to the diagnostic LEDs either (and the SROM wouldn't be
able to load the DROM, presumably).
You could check if flashbus is mapped by peeking at bank 8 memory
controller registers and seeing if the contents provide the necessary
wiring
(in particular if bit #0 aka `s8_Valid' in the
16-bit word at
0x180000b00 is 1). These registers are listed in the same manual -- with
a
further reference to the (rather fat) memory
controller manual. If not,
then
you'd have to set them yourself. There could be
PALcode entry points to
access flashbus too I suppose, although regrettably my Alpha-fu is not so
deep as to know this offhand.
I need to understand more about the Alpha architecture to understand this,
but I will check. All I can say is that I did try to read the bank 8 base
address register and I did get a value, but I didn't undertand what it
meant. Will do some reading.
NB all the address space from 0x100000000 through to 0x1ffffffff is
uncacheable it would seem, so no need to be concerned about this part.
Thanks
Rob