2 Dec
2014
2 Dec
'14
11:14 a.m.
On Tue, Dec 2, 2014 at 9:51 AM, Jon Elson <elson at pico-systems.com> wrote:
I'm not talking about a manual for a specific chip with a bunch of I/O.
Those are routinely over 1000 pages, and don't include the CPU
architecture.
What I'm referring to is the manual for *only* the ARMv8 CPU architecture,
and it is 2000 pages, with little of the redundancy of SoC manuals.
On 12/01/2014 11:13 PM, Eric Smith wrote:
Now you know two people who worked with them.
You haven't seen "off the deep end"
CISC until you look at the Intel iAPX
432,
which makes the VAX architecture look lean and mean.
Yes, I do KNOW about the iAPX 4/32, and know somebody who worked on one. Glacially slow.
"Glacially" is overstating it. It was slow. If it had shipped two years
earlier, as originally intended, the performance would have been
somewhat more in line with expectations.
and if object-oriented machine language
was your thing, it was what you needed.
Not really. It turned out not to be what anyone needed for anything. That
resulted in the P7 RISC design, still with some object-oriented features.
The P7 ultimately became the i960. (Note that Intel has reused the "P7"
designation for other things since.)
And I
wouldn't argue that it's CISC, but even the ARMv8 architecture
manual is
over 2000 pages.
I use the Beagle Board and Beagle Bone. The TI manual on the OMAP
processors
is VERY badly organized, and vastly larger than it really needs to be.