unibus to modern disk interface?

On Oct 16, 2012, at 6:37 PM, Peter C. Wallace wrote: For that matter, a good high-speed comparator will do the trick admirably (throw in a little positive feedback for hysteresis and overdrive and you're good). Last I checked (which was not a totally exhaustive search about a year ago), it was hard to find ones that met: - 35 ns Tpd - <= 9.35 pf input capacitance - <= 80 uA input impedance - < $1 per gate All the fast ones turn out to be really expensive, and when you're talking about as many inputs as you need (22 for QBUS' BDAL lines alone, plus a bunch of others), it adds up quickly. So I'd like to see what can be done with discrete logic, ideally FETs. Logic thresholds, especially with FET gates, are a bit out of my league, but it's one of those things I'd love to learn if only I could find some good reading material. My initial thought is that you'd at least want something akin to a cascode arrangement, since the Miller capacitance on a straight-up grounded-emitter amplifier is likely to be ugly; I might be over thinking it. One benefit of doing the bus logic in a CPLD/FPGA is that the polarity of the data coming in doesn't matter for any practical purpose. If you were to decompose things into, say, a PAL and some 74xx gates, it can become a little hairier. In any case, my recollection is that the data on QBUS is inverted, which makes things easier for single-transistor drivers (and other inverting logic, which is presumably why). - Dave