On Thu, 31 Aug 2006, Roy J. Tellason wrote:
No,
transputers are 16 or 32 bit RISC chips, some with 64 bit IEEE
floating point either in hardware or emulated via microcoded instructions.
Their best features are: 4 async 2-pair 5, 10 or 20MHz full duplex
communication links on die, a minimal ammount of RAM on die, and the
ability to be booted and debugged over any of the 4 links. Thus, you can
build a parallel "computing surface" with just the transputer chips plus
power and clock sources. They also have a fairly flexible RAM/ROM
interface, but it's entirely optional. Finally, the whole family is
machine language compatible (later members only extended the instruction
set). In theory this let you mix family members in a machine, but
unfortunately there was no "what family member am I running on"
instruction.
Which makes me wonder what would happen if you fed it an extended instruction
that it didn't know how to deal with.
I don't know, but finding out is one of the first things on my list of
things to do once I build some boards to plug mine into and find or make a
transputer link interface (anyone got a C012 they wouldn't mind selling?).
My wild-ass guess is they halt and wait for you to assert the reset or
analyze pins. What I really want to do is write a bug-compatible emulator
for them, so people could play with transputers without having to spend
hundreds of dollars and hours :-)
Alexey