davis wrote:
<snip>
IMHO, to build anything interesting and useful, the
rules should be
256 2n2222s for the CPU. The memory design requirements, (unless
you're looking to build a CARDIAC clone with 10 cells)
should allow use of contemporary memory ( but not too much, just for
code, not ALU lookup tables). The guy that did the relay computer
allowed that, and he was able to execute interesting code?.
This kind of a CPU design screams bit serial execution. Take a look at
the Nebula design (OSU) on bitsavers for insight.
Cheers,
Jim Davis.
I've been thinking about a eprom/latch/sequencer based CPU since I
picked up a hundred or so 16 bit wide 64KW eproms from a dumpster at
work.
Sorry, that's the Oregon state archive. Still, even without my
complaints, it sounds like fun and a great way to wreck any
relationships and careers.
Jim Davis.