PDP 11/73 is ALIVE!

Here are the notes I took back when I had a physical KDJ11-A manual to refer to: Powerup sequence: Turn off LED 1 Assert BINIT L Wait 10 uS Negate BINIT L Clear MMR0 Clear MMR3 Wait 90 uS Clear PIRQ Clear FPS do { Read jumpers Clear CPU ERROR } while BPOK H is negated Set CCR<8> to flush cache, and clear all other CCR bits Clear MSER Clear PS Set CPU ERROR to 0177766 Read CPU ERROR Clear CPU ERROR if (value read equals value written) turn off LED 3 Read memory location 0 if (no NXM abort) { Read memory location 0177700 if (NXM abort) { Turn off LED 2 } } Read memory location 177560 if (no NXM abort) turn off LED 4 switch (powerup option) { case 0: pc@24, ps@26, begin execution case 1: ps=0, enter ODT case 2: pc=173000, ps=340, begin execution case 3: pc=(user boot << 12), ps=340, begin execution } ODT G command: Turn off LED 4 Assert BINIT L Wait 10 uS Negate BINIT L Clear MMR0 Clear MMR3 Wait 90 uS Clear PIRQ Clear FPS do { Read jumpers Clear CPU ERROR } while BPOK H is negated Set CCR<8> Clear MSER Clear PS Begin execution ODT entry: DATI from RBUF (017777562) and ignore the character. Print <CR> <LF> Print R7 in %06o Print <CR> <LF> Print @ Enter wait loop ODT input sequence: Busy-wait using DATI for RCSR (017777560) bit <7> to become 1 DATI from RBUF (017777562) and use low byte ODT output sequence: Busy-wait using DATI for XCSR (017777564) bit <7> to become 1 DATO to XBUF (017777566) with character in low byte; high byte is undefined If XCSR bit <6> (interrupt enable) is set, program will get interrupt when P command is used. If G is used, BINIT L is supposed to clear all interrupt conditions. ODT has 10 internal states. Each echoes unknown characters as ? and ignores them. ODT echoes parity bits faithfully but ignores them when processing. Generated characters have 0 parity. All commands are echoed except for <LF>. R6 is the stack pointer selected by the PS. The PS responds to bus address 17777776; R0-R7 are not accessible by bus addresses. MMU registers are accessible by their bus addresses. Bus timeout generates "?\r\n@". ODT commands: / Open a bus address or processor register. @R3/123456 open R3 @RS/123456 open PS @1000/123456 open location 01000 With no specifier, @/123456 re-opens just-modified location (if none, ie if just entered ODT, ? is given.) <CR> Close open location. If new data precedes the <CR>, thing is changed. Reponse: <CR> <LF> @ <LF> Close open location, open next location. (If PS is open, this is like <CR>.) Doing this when R7 is open gets to R0. Address rollover is modulo 32K; to cross a 32K boundary, the address must be re-entered. Is echoed unusually; response is <CR> <LF> @, then sequence to open next location. \0, \2, \12 are echoed as "?\r\n@". $ is alternative to R for register designation with / command. If more than one character follows R (or $), last one is used, unless last three are 077 or 477, in which case PS is used. The T-bit of the PS cannot be changed by ODT (misfeature?). G Go. Echoed, then \0\0 is printed to flush the G, then above sequence is executed. P Proceed. No programmer-visible state is altered. After the P is echoed, the machine is in instruction-fetch microstate. ^S Binary dump. After the echo, two 8-bit bytes are expected, high byte first; they are not echoed. These form a starting address in the first 64K of core. ODT responds by dumping 8 bytes from that address in raw binary, then <CR> <LF> @. H Reserved to DEC in the future. Treated as an invalid character. /~\ The ASCII der Mouse \ / Ribbon Campaign X Against HTML mouse(a)rodents.montreal.qc.ca / \ Email! 7D C8 61 52 5D E7 2D 39 4E F1 31 3E E8 B3 27 4B