Where are your problems? The SIO supports IMHO the Reset of the IEI-IEO
Chain trough a bit in a register, that's easier as on the other chips.
IEI/IEO are not the proble,
The problem is to get IORQ/, M1/, Rd/ etc right -- and the right clock
pulses on ne phi. IRIC, it does a write if it sees IORQ/ and doesn't see
Rd/ or M!/ within a given number of clocks, it then samples the data bus
after said number of clocks. Tryign to get that right on a non-Z80 is
mnot totally trivial.
Thinking about it, I've sene 6800-bus ICs in Intel/Zilog systems (The
6845 being the obvious thing that turns up everywhere, but I've seen
6522s is such machiens too). I don't think I've ever seen a Z80
peripheral chip in a non-Z80 system. Which may mean it's not jsut me who
thinks it's non-trivial to use them.
-tony