5 Aug
2005
5 Aug
'05
7:48 a.m.
Rumor has it that Jim Brain may have mentioned these words:
Paul Koning wrote:
If you're looking for quick-n-dirty, you could always just ignore half of
the capacity and send/receive 8 bits.... With 16 Meg flash cards, that
might be less than optimal, but with the costs of 512M/1G cards where they
are today, it is an option whilst still retaining a decently large amount
of quick storage for an 8-bit machine, with a lot less hardware & coding to
interface it.
This would preclude any sneakernet applications, however.
Just a [prolly dumb] thought,
Roger "Merch" Merchberger
--
Roger "Merch" Merchberger | A new truth in advertising slogan
SysAdmin, Iceberg Computers | for MicroSoft: "We're not the oxy...
zmerch at 30below.com | ...in oxymoron!"
No... the classic PIO mode IDE registers are 8
bits wide, not 16.
Some devices may allow 16 bit access as an optimization, but 8 bit
accesses is all you need.
The IDE command registers are all 8-bits wide, but the Data register is 16
bits wide. You have to support a 16 bit transfer in order to get the data
from the sector buffer (256 16 bit transfers nets you 512 bytes of data,
the IDE std sector). IN the newer 48 bit addressing mode, the LBA
registers grow from 8 bits to 16 bits as well.
All the IDE code I've looked at does it this way. I believe I have the
ATA r4 spec here that states that as well.
But, if you've noted a way to switch IDE into 8-bit mode, let me know.