Usually the terms "parity SIMM" or "ECC
SIMM" are used for SIMMs with
36 data bits. If the extra 4 bits are used for parity or ECC depends
on the memory logic in the machine, not on the SIMM.
Except I don't think 4 extra bits are enough to do ECC on 32 data bits.
There simply aren't enough possible codewords to do even SEC, much less
SECDED. (SEC on 32-bit data words demands *at least* a factor of 32
extra codewords, to handle the single-bit errors (33, actually, to
include the no-error case). But 4 extra bits gives only a factor of 16
extra codewords.
For machines with 64-bit memory buses (machines which require
32/33/36-bit SIMMs but demands they be installed in pairs usually have
64-bit data buses), you have 64 bits of data and 8 additional bits,
which ought to be enough to do useful ECC, though I haven't worked out
a specific example code.
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