3 Jul
2018
3 Jul
'18
6:51 a.m.
From: Glen Slick
There are 88 41256 256Kx1 DRAMs on a 2MB MSV11-J. Each
512KB bank has
22 256Kx1 DRAMs organized as 16 data bits plus 6 ECC bits.
Umm, I think the internal organization is paired banks (one for even word
addresses, one for odd); the manual talks about doing double-word reads
(although only one word gets transferred over the bus at a time, but the
PMI has some optimization for double-word cycles, IIRC).
If someone was sufficiently motivated I suppose they
could probe each
of the 88 DRAMs while writing various bit patterns of data to various
memory locations and work out the mapping that way. ... I'm not sure
which would be more work, probing one or a small number of DRAMs at a
time
Oh, that's an improvement on what I was thinking of as a fall-back, if nobody
has the info (which was to tie the outputs of individual DRAM chips high or
low - depending on how they implement their output stages - through a
suitably-sized resistor, and look to see what effect it had on writing and
then reading - all 0's or 1's, depending on the tie - still a lot less work
than pulling chips :-). Dunno why it wasn't obvious this would be easier! :-)
I would/will just write a two-instruction loop (in the PARs) which writes a
word with only a single '1' bit, hook up a 'scope (I'm too lazy to hook up
a
logic analyzer :-) to a DRAM input, and walk the bit through the odd and even
words until I see it on the 'scope.
I thought about doing the ECC bits first, using the maintenance mode (to walk
a '1' through the ECC bits), to avoid getting confused by 1's being written
to
them during the above process, but that would be a lot more work, since I'd
have to look at all the chips in the array to find the one that's getting the
'1' ECC bit.
It'll probably be a lot easier to just disable ECC, and write all 0's to all
the ECC bits while doing the data bit discovery (above); once those are done,
the remaining chips are known to be ECC, and I can walk a '1' through the ECC
bits to work them out.
From a brief look at the manual it might be possible
to use diagnostic
modes to write specific ECC bit patterns and work out the ECC bit
mappings as well.
Yup, that was my take too. Although I'm having to re-read the manual a few
times to fully grok how all the various mode bits interact!
Might be very tedious, so might need lots of
motivation.
I think that using the procedure above, it'll go reasonably quickly,
actually; the more bits I ID, the fewer values I'll have to try on each
succeding DRAM chip.
If I ever get really bored some day maybe I'd take
a look and try to
see just how tedious it might be.
I'm going to need this info real soon (to hopefully fix a broken MSV11-J),
so I'll probably start on this later today if nobody has the info.
I'll add the info to the MSV11-J page on the CHWiki, once I have it.
Noel