FPGA VAX update / cool microcode evolution

Sridhar Ayengar wrote: Sridar, you are jumping to conclusions. I agree with Steve, and I'm an atheist. Certain people don't seem to understand that the thing about swear words is that their power derives from their infrequent use. Use them too often (once a sentence for certain posters) and they are just obnoxious filler. Getting back on topic, here is an interesting old computer tidbit. Wang started shipping their 2200 family of computers in 1972. The first generation used a 4b ALU and a lot of microcode. The next generation, circa 1976, used an 8b ALU, a more powerful microcode instruction set, and ran 8x faster overall. Then Wang put more emphasis on their VS family, and the 2200 languished. In the early 80s they reduced the CPU to a single VLSI chip, although it ran at the same speed as the logic it replaced. In the late 80s there was still pressure from customers to continue and extend the 2200 family, but Wang apparently didn't want to commit the resources to a whole new CPU design, nor to port their sprawling BASIC-2 to an existing processor. Now, getting to the interesting part: Wang solved this problem around 89 by coming out with a CPU card upgrade -- it consisted of a 16 MHz 386 and a binary translator that converted 2nd generation microcode to x86 instructions! Just swap the CPU, keep all peripherals and chassis and you get an immediate 2x speed improvement. Although there was a slight startup cost when microcode was loaded, translation could be done statically due to the simple nature of the microcode. A short time later they came out with a 33 MHz 386, doubling the speed again. If they had kept upgrading their technology, a 2 GHz CPU today would make that BASIC 250x faster than the VLSI version. In comparison, my not so agressively optimized 2200 emulator is only about 15x faster at the same 2 GHz clock rate, as it uses straight-forward cycle-by-cycle microcode interpretation.