From: cclist at
sydex.com
Here's another paper that concerns itself with the design of a
digital data separator:
http://hungngo-asic-design.tripod.com/Chip_Tech_HDD_paper.pdf
--Chuck
Hi
This paper got me thinking a little. With digitized data,
it should be possible to not only correct for bit shift in
mild cases but also detect when it is so sever that
there is an error.
My understanding is that bit shift is a phase error that
looks like the response is too slow. In other words
two pulse getting too close tend to spread apart.
It seems one can create a number of FIR filters to
analyze the data. Some with corrections for to much
precompensation and others with correction for too
little. You then just feed them all in parallel and pick the
one for that tracks with the least timing error, for
that particular track.
This is something that can not be done inthe analog
world because analog tends to be IIR and not FIR.
In the article you've posted, they've oversampled
by 32 ( 5 bits ). It is a bit high for most but I suspect a sampling
system of maybe 8 is more practical for our use.
This way, one could tune for the bit shift seem on
each track, which should be similar. Also, one
could keep track of errors, such as knowing when
a pulse was missed and use that to correct if and
error was detected.
Dwight
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