16 Jul
2007
16 Jul
'07
11:50 p.m.
dwight elvey wrote:
Hi
Actually logic state can be if the core changes state, that is a one
and if it doesn't change state, that is a zero. The direction of
the cores state isn't important.
This could even be in phase relation to a clock. When the clock
goes hi, a change is a one while when the clock goes low, a
non-change is a one.
There is no reason to restore the state on each cycle. You just
have to be a little more flexible on what you mean by a one
or zero.
Dwight
I naturaly assumed the core logic is a ring counter. Reset might be a
bitch but other than that... it feels straight forward.