15 Jun
2009
15 Jun
'09
4:20 p.m.
From: Warren Wolfe
Sent: Monday, June 15, 2009 2:40 PM
Tony Duell wrote:
>> True enough, Tony, but with the right
emulator, I CAN single step, and
> Aingle-step instructiosn, possibly. But
single-step the CPU microcode?
> And at a clock cycle level (even lower than microcode)? I've not seen
> an emulator thart does that (it's possible, of course).
Yes, it's possible. No, I've not seen it.
Hey, there might be
something you'd enjoy doing in software.... <Grin>
As a matter of fact, this is one of the things that makes VHDL so useful
in FPGA-based designs: You have the ability to simulate the entire object
down to the clock cycle level, if you think you need to. (The same may
be true for Verilog, but we were a VHDL shop.) And a lot of the tools
were available for free, so match the typical hobbyist's budget.
Rich Alderson
Vintage Computing Server Engineer
Vulcan, Inc.
505 5th Avenue S, Suite 900
Seattle, WA 98104
mailto:RichA at vulcan.com
(206) 342-2239
(206) 465-2916 cell
http://www.pdpplanet.org/