I confess
ignorance as to what the I2S image process/display system
even *is*. I'm largely ignorant of the graphics hardware marketplace
before 1988.
Basically, they're TV-scan-rate image displays for minicomputers. I
have
Unibus interfaces for mine, but the schematics also include
diagrams for
DG Nova and HP2100 interfaces IIRC.
The basic idea is a number of byteplanes, each 512*512*8 bits. The
outputs of these go to (programmable) look-up tables, then to a full
adder, then to more look-up tables, then to DACs (either 3 * 8 bit
or 3 *
10 bit). By careful programming of the lookup tables you can
obvious add
the values in the byteplanes, subtract them (program a 2's complement
table), multiply (program log/antilog tables) and so on.
And there's more. Firstly there's a hardware histogram board which
produces a historgram of the pixel values in a byteplane (I think,
maybe
the outputs of the adder), and lets the host computer read it out.
There's the 'transform ALU' which treats planes 0 and 1 as a 16 bit
accumulator, and lets you combine that with any other plane using any
function a 74181 ALU chip can perform. And there's a cursor,
moveable by
a graphics tablet or trackball. And overlay bitplanes for text/labels.
I own 3 of these machines. The 70/E is in 3 rack crates (processor
and 2
memory crates). It uses 4K bit DRAMs (over 3000 of them), and has a
total
of 6 planes. The 74/F4 uses 16Kbit DRAMs, has 4 planes, and fits
into 1
crate. The Model 75 is a later unit, using 64K DRAMs, and has some
other
features like a small (empty) Multibus cage for a local CPU, and a
'transform sequener' -- a 2910 sequener chip + control store RAM which
lets toy user-microprogram the thing to do automatic sequences of
operations.
Oh MY. That sounds like a WHOLE LOT of fun! I'd try to talk you
out of one of those, but I fear the result would be my having even
less of a social life than I have now!
-Dave
--
Dave McGuire
Cape Coral, FL