14 Aug
2006
14 Aug
'06
9:45 p.m.
Ethan Dicks wrote:
On 8/15/06, Don <THX1138 at dakotacom.net>
wrote:
But cache RAM is power hungry and has little practical chance
of being converted to BBSRAM
Outrageous overkill. What's that, 10ns
memory? What's the 8's
memory cycle time?? ;-)
The machine cycle time for an -8/e is 1.2uS. ISTR that a core read
cycle on an MM8E (Omnibus core stack), including replacing the old
value after the read destroys it, is on the order of 950ns, but that's
from memory, not from looking it up. In any case, *any* SRAM, even
stuff from the mid-1970s is fast enough. As for overkill, it's not
about memory access time, it's about modern availability and package
count - if you want to use a 32Kx8 SRAM, your choices are,
essentially, uber-fast cache RAM in a skinny DIP or still-too-fast
CMOS SRAM (62256) in a wide DIP form factor. One could even wire up a socket with 3 rows of pins so
the user could
choose skinny or wide - the RAMs have, essentially, the same pinout.