13 May
2004
13 May
'04
6:27 a.m.
Paul Koning wrote:
That should do the job just fine for MSCP (except that this may be too
large a job for a PIC). For older disk controllers, this approach is
likely to be hard because touching CSRs causes actions to take place,
and often actions are tied to bits, not just to the whole CSR. You
may be able to emulate that in software, but it's likely to be tricky
because your CPLD will have to be more than just a register file.
well, yes, cpld need to notice when a register is written from the
unibus and potentially interrupt the cpu.
there are certainly some interlocking issues to keep the two cpu's in
sync.
no reason why the cpld can't do this on bit by bit basis...
I'd say that anything that was originally done as a
microprocessor
plus register file would be no problem. That means (T)MSCP devices,
the DMC/DMR/DMP/DMV11 series comm controllers, the KMC11, and the Pro
hard drive controller. But if it started out as hard logic, a
microprocessor emulation wouldn't be as easy. That's why the
programming interface style changed quite drastically when
microprocessor control became interesting.
roger.
-brad