On 01/23/2014 07:46 PM, David Riley wrote:
When I've done UARTs in FPGAS, I typically only do
the
sampling in the middle of the bit period. I do check for
a stop bit in order to detect framing errors, but slicing off
the last eighth of the stop bit would probably go entirely
unnoticed by any of my implementations, which seem
to follow most "best practices" as far as efficiency goes.
I've always detested the term "stop bit"--this should have been called
"inter-character time" or some such thing. It's not a bit; it carries
no information and talking about 1.5 "bits" in the case of 75 bps
5-level transmission is just plain insanity.
Back to Eric's observation--does anyone with a mechanical terminal (e.g.
ASR 33, Flexowriter, 2741, etc.) accommodate shortening the "stop bit"
interval? In particular, those devices requiring only 1 "stop bit"...
--Chuck