> A cute trick commonly used in the CP/M days (and
later) was to put a
> boot EPROM board in the same (conflicting) memory space with RAM; ...
> EPROM board read access generated many wait states; the trick was the
> EPROM board ignored write cycles but the underlying RAM didn't. I forget
> how we handled the EPROM 'read' cycle but it was buss-safe (S100) and
> simple.
On Sun, 2004-08-01 at 18:56, Bill Sudbrink wrote:
I believe that was the "PHANTOM" line... pin
67 (according to _THE_S-100_
AND_OTHER_MICRO_BUSES_ by Poe and Goodwin).
Ugh! I remember now! >shudder< S100 interfacing dribbles back into
brain... not good! :-)
(I should go buy an S100 book though for reference. I have nothing from
that era at all except one WordStar book.)