On Jun 26, 2012, at 6:15 PM, Chuck Guzis wrote:
On 26 Jun 2012 at 16:44, David Riley wrote:
I might think a PIC32 would be a bit more
efficient (depending on the
ARM used); don't most MIPS architectures have a bit more horespower
than most ARM architectures? Mileage may vary, of course.
For me, it's the peripherals. "framed" SPI essentially gives you bit
stream capabilities with 32-bit DMA. The DMA channels also have a
CRC generator, if needed. Most inputs are 5V tolerant. 128KB of RAM
on-chip.
I'm not saying that there isn't an ARM out there with the same
capabilities, but I haven't seen one myself.
Check out Freescale's Kinetis family, if you're interested. Pretty
similar peripheral set and size range.
I don't see any issue with making this a
software-only. Use one of
the SPIs to interface to a SDHC.
Why bother with an FPGA?
Well, I like them for CDR tasks because it's really easy to make
a clock-efficient digital PLL with one. I'm comfortable with
them and feel pretty confident that I could create a pretty
robust implementation without worrying about whether I have the
processing horsepower to handle the load.
It mostly comes down to the tools you like to work with, I
guess. I work with FPGAs a lot and feel like one bolted onto
a microcontroller gives you a higher degree of flexibility
than a software-only solution. That is, of course, if you
choose to accept the closed software ecosystem of the FPGA
vendors, which has been hashed to death on this list and is
not something I'm keen to debate further.
- Dave