-----Original Message-----
From: cctalk-bounces at
classiccmp.org
[mailto:cctalk-bounces at
classiccmp.org] On Behalf Of Don North
Sent: woensdag 6 september 2006 10:12
To: On-Topic and Off-Topic Posts
Cc: cctech at
classiccmp.org
Subject: PDP-8m Console Switch Problems
[... snip ...]
(and IMHO the designer should be hung by his entrails).
Agreed!
[... snip more ...]
I'm about ready to rip out the two bogus '175s
and replace
them with some other logic (three '00s if I calculate correctly).
I can't be of much help, because shorting a TTL output to force
a transition in the inside logic of the D flipflop to flip the
other output, is not my cup of tea.
However, perhaps this will work. It keeps the 175, but you might
need some changes in the traces/wriring, Don.
+5V +5V +5V
| | |
| | |
|~| |~| |~|
| | | | | |
|_| |_| |_| 1/6*7404
| | | 1/4*74S175 |\
| | | +-----------+ | \ to
| | +---| Dn Qn |------| >O-----9318
| | | | | / priority
| +-----+----|>Clk | |/ encoder
| | | |
+----------------o| MR~ Qn* |o---
| | +-----------+
| |
__O ADDR |
O-/ LOAD |
| O------------+
| (active position)
GND
The switch is drawn in its rest position. The flipflop is held in
reset thru MR* at GND. The D input is already high. When you push
the switch, MR* goes high at a moment later CLK goes low. When you
release the switch Clk goes high again, and the flip flop loads
the D input to the output. A moment after that MR* goes low again
and resets the flip flop.
This is theory ... test in practice :-)
success, Henk
PA8PDP
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