Tony wrote....
The 7414 is a pretty cheap chip, and not hard to find
(I think you want
to keep the same family as the original here, though -- that is don't use
a 74LS14). I would change it on the card where you know there's a problem
ansd see what happens.
Did that today. LTC is going through the schmitt trigger
just fine. The diag
no longer fails on "bit 7 stuck in LTC". Instead, it now locks up at the
same spot in the DL11-W diag as the other two DL11-W cards. Right after "01
devices under test", the machine just halts with the cursor still at the end
of that line.
You haev too many unknowns IMHO. You don't _know_
that any of the boards
are working.
Agreed.
OK, is the halt a genuine one or not? In other words
did it halt on a
HALT instruction, or because there's something wrong with the procesor?
It's possible there's something seriously wrong with the interrupt
arbiter logic, I think...
Greaaaat :\
Here's where I'm trying to start. I was looking at some of the code on this
website, hints for troubleshooting a dead PDP11. It's at:
http://www.psych.usyd.edu.au/pdp-11/hints.html
I enter and run the Line Time Clock Interrupt test from that webpage, and
the system halts at location 4. How on earth? Does the 11/45 have some
interrupts to specific locations for things like power fail or something?
Should a unexpected trap to location 4 mean something special to me? Here is
the section from that website reproduced below:
-------
Line Time Clock Interrupt Test
Most of the older PDP11's had a line time clock that would interrupt at
mains frequency (50 or 60Hz). On early LSI-11's, it was not programmable but
enabled by a switch on the front panel. Load the following program (which is
just a trap catcher and interrupt enable), and start. If an early LSI-11's,
substitute 000240 for the lines marked #, run the program for a second or
two, then enable the clock. The program should halt at address 104 (the
interrupt vector address is 100, and the vector is loaded with 102, which
then executes a halt at 102, the PC will then be 104).
Location Contents Opcode Comment
001000 012706 mov #770,sp set the stack pointer
001002 000770
001004 005000 clr r0 memory pointer
001006 012701 mov #2,r1 trap value
001010 000002
001012 010120 loop: mov r1,(r0)+ set trap vector value
001014 005020 clr (r0)+ set halt instruction in trap
001016 062701 add #4,r1 update r1 for next trap
001020 000004
001022 020600 cmp sp,r0 load up to stack pointer
001024 001372 bne loop
# 001026 012737 mov #100,@#ltc enable clock interrupt
# 001030 000100
# 001032 177546
001034 000777 br . loop for ever
If the processor doesn't halt, then your clock isn't running. If it halts at
6, then the clock register is missing.
----------
I also wanted to run the trap catcher program from that website to help test
software traps & interrupts. However, I don't understand part of what they
say to do. I can certainly enter the program, but then they say to deposit
777 into loc 1000. That would overwrite the first word of the program. Not
sure what they want done there or I'd run that to see what it comes up with.
Any thoughts?
Jay West