segmented memory models

Tony Duell wrote: Do you design for a living? If so, then my hat is off to you for thinking of *EVERY POSSIBLE* use of the design you have made. I design for a living, and I think you're asking way too much of a designer. The best designers plan for the stated requirements and try to consider the long term, but they are not prophets. I think subjecting the designers choices to things that came much later is ludicrous. And on the RAM at $0000 issue, I think that is simply Intel and the PC environment responding to bad choices that people made. Intel 8080 designers no doubt assumed (as the MOS folks did), that startup vectors would be in ROM. The Development Board chose RAM + switches to offer some flexibility, which is to be expected. That CP/M and later systems assumed RAM at $0 can't be blamed on Intel. The fact that they later tried to fix the issue by moving the jump table to the top segment seems to me to be reacting to the "status quo", not creating a bad design. CPUs need to fetch vectors from a fixed address. Anywhere you put them will offend someone. I think Intel putting them at the bottom sounds like a fine design, at least in the '70s. 'C' and it's desire to have address 0 be NULL was not around on the micros, and putting it at the bottom alleviated the need to keep moving it as the "top" of memory keeps moving up. I don't think I would call that a correct design. It forces all programs to treat all IO as relative addresses, since they will move as the design moves. If there are processing penalties for relative addressing, you've sealed the programmer's fate. It was a good choice for minicomputers, as they specced out multiple addressing options for various levels of the market, and programmers all designed with that in mind. How was Intel to know the 8080 would sell as well as a DEC CPU? Applying the accumulated knowledge of history to attack a designer who did not have access to that knowledge is bad form, in my opinion. For the record, I despise the segmented architecture of the 8086, but I truly understand and appreciate the pains the designer went to allow porting of 8080 apps (I think porting might be too much to call it, I think a simple assemble would do the trick, as the 8080 assumed a 64kB address space, which is the same as one segment. Why the overlapped is unclear to me, but I wouldn't call that a bug. And, I admit that I despise the segments only because I didn't care about the 8080, and thus compatibility with it was not on my radar. I reserve "brain damaged" for something that does not satisfy requirements available at time of design, or were blatantly obvious at design time, or shows a clear lack of ingenuity or creativity on the designer's part, and cannot be explained away by compatibility concerns or reactive pressures (designing something in because, in spite of the best efforts to document that people not do it, they do anyway) Jim