21 Mar
2012
21 Mar
'12
8:20 p.m.
On 21 Mar 2012 at 12:12, David Riley wrote:
On Mar 21, 2012, at 11:54 AM, Jon Elson wrote:
I worked out a Pertec interface in a CPLD so that anything capable of
a wishbone interface could use it. One of the issues with
Pertec/Cipher interface is it's dumb-as-a-stump. There are no buffer
handshake lines, per se. If you've intiated a read, the drive throws
data at you with a simple strobe--there's no acknoledge handshake.
The same for write--and you're expected to compute the parity as
well. Status bits range from real-time (i.e. drive is on-line) to
transient (pulse during the frame transfer). No lines are
bidirectional, so mostly the CPLD functions as a bus expander with
some additional logic to compute parity and latch transient status
bits.
But heck, you could probably work out most of an interface with a
couple of PIAs.
Buffering on fast streamers, of course, helps considerably. I
believe that the interface spec limits the transfer rate to about
1MB/sec. If you don't get around to issuing IGO during the IRG, the
tape will stop, the drive will backspace and take a running start at
the next block. Very time consuming.
--Chuck
I am working on an FPGA interface to the Pertec
formatted interface,
it ought to work, but I don't know how much fooling around it will
take to get reliable data transfers.
Pertec is a pretty simple interface with handshake lines. I would
imagine you shouldn't have much trouble. An FPGA may be overkill
(certainly harder to work with 5v); you may find it even easier to
just use a microcontroller. My Cipher F880 runs on just a Z80
internally, nothing fancier than that.