3 Feb
2007
3 Feb
'07
8:26 p.m.
On 4 Feb 2007 at 1:00, Tony Duell wrote:
What happenms with the 'repeat' instructions,
LDIR, etc? I seem to
remember they keep on re-fetching the opcode, do they assert M1 each time?
Yes indeed it does. The repeated operations run the CPU through RNI
and decode each time. Which is why the Z80 gained most of its speed
over the 8085 by having one fewer clock in an instruction cycle, not
by the added instructions. The same sort of behavior exhibits itself
on some of the x86 CPUs--where:
l1:
mov al,ds:[si]
dec cx
mov es:[di],al
jnz l1
runs about as fast as rep movsb (and, in cases, somewhat faster). On
those same CPUs, replacing the dec cx/jnz with a loop instruction
will actually slow things down.
That doesn't mean that an analogue meter wouldn't indicate
variations. On a Z80, the instruction length can vary from 1 to 5
(IIRC) bytes. Given additional cycles for memory and I/O space
references, the instruction issue rate can vary quite a bit.
Which may have absolutely nothing to do with how much useful work the
CPU's actually doing.
Cheers,
Chuck