Chuck Guzis wrote:
div10:
xor a
ld de,0fd80h ; largest power of 2 times 10 less then 800d
ld b,07 ; only seven loops needed to finish divide 80
divloop:
add hl,de ; trial subtract
jr c,div10s1 ; carry means trial passed
sbc hl,de ; undo previous add, carry is clear
div10s1:
rl a
add hl,hl ; shift number to reuse same constant, 640 decimal
djnz divloop
add hl,hl ; push full remainder in HL
ret
Again, I haven't tried it out, but it should work.
Every time I see code like this for processors without a native DIV, I
wonder if the same code ported to x86 would indeed outperform the native
DIV. Would it? I know that on a 286 or higher, where MUL and DIV were
greatly optimized to about 12 cycles, no; but what about on the original
808x, where MUL/DIV could take as much as 144 cycles?
--
Jim Leonard (trixter at
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