15 Dec
2008
15 Dec
'08
5:43 p.m.
der Mouse wrote:
The idea of a RISC is that out of few general addressing modes
( to keep decoding simple ) you generate all the other needed
ones in software. Since decoding is so simple you can ran faster by
pipelining
everything and goes real fast, providing *gotya* main memory is that fast
too.
The 8 is reduced because you have to cram everything in 12 bits.
How do you
have RISC from a CPLD since RISC implies a large register
stack?
It does? I thought it implied a (moderately) minimalist instruction
set. This tends to correlate with having lots of registers, but that's
hardly necessary - consider the PDP-8, for example.
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